Although viewed primarily as an input device, the keyboard attached to personal computers, starting with the IBM Personal Computer AT and later models, is both an input and an output device. For example, the keyboards typically have "Num Lock", "Caps Lock", and "Scroll Lock" indicators that can be set or reset from the computer system, and in some models, the keys can be reprogrammed. Thus data is sent in both directions through the keyboard interface.
The keyboard interface is a serial interface having two signal lines, keyboard clock and keyboard data, as well as power and ground signals. The keyboard clock and keyboard data signals are open collector signals pulled high through a resistor. When the keyboard wants to send data to the computer system, it first checks the keyboard clock and the keyboard data signals, and if both these signals are high, the keyboard is allowed to send data. To send data, the keyboard puts a start bit on the data line. The start bit is a zero, which pulls the keyboard data line down, and then the keyboard pulls the keyboard clock line down to transfer the start bit to the computer. The keyboard then raises the clock signal, places bit zero on the data line, and pulls the keyboard clock line down again to send bit zero to the computer system. This process is repeated for each of the other seven bits of data, a parity bit and a stop bit, which is always a one. The keyboard leaves the stop bit on the data line, which allows the data signal line to stay high.
The keyboard also checks the clock bit between each data bit, to determine if the computer system is holding the clock bit low to ask the keyboard to stop sending data. The computer system is only allowed to pull the clock down during sending of the first ten bits.
When the computer wants to send data to the keyboard, it first verifies that the clock and data lines are high, and then it places the start bit on the data line, which pulls down the data line. When the keyboard detects the data line down, the keyboard cycles the clock line ten times to transfer the data from the computer system to the keyboard. Only ten clock cycles are required, since the start bit was already on the data line. Thus, the keyboard is always in control of the keyboard clock line, except that the computer system may hold the clock line down to stop a transmission from the keyboard to the computer system.
Normally the clock signal makes transitions only when data is being transferred, and it only makes as many transitions as necessary to transfer a character. The protocol specifies that the computer system transmitter will change its data on the negative edge of the clock, and that the computer system receiver will accept data on the negative edge of the clock. Normally the keyboard, or other external device using this protocol, will perform the complementary action on the positive edge of the clock. That is, the external device changes its data on the positive edge of the clock, and accepts data on the positive edge.
This creates a limitation for loopback testing, however, since the protocol builds in a race condition for any loopback of data. Because the computer system transmitter must change data on the same clock edge that the computer system receiver clocks data into its circuit, the loopback data may be incorrect. Loopback testing is important for diagnosing defects during manufacturing of the circuit and also for diagnosing defects should the circuit fail in use.
Prior art versions of the keyboard interface typically use an embedded microprocessor to control the interface, or they use a Universal Synchronous/Asynchronous Receiver Transmitter (USART) to send data over the interface. For example, in Micro Cornucopia, Issue 52, March-April 1990, p. 40, a keyboard interface circuit is shown that uses an 8251 USART. Because USARTs were designed to work with the RS/232 serial interface commonly used with modems, they send and receive data on different signal lines, thus loopback testing is easily accomplished. Also, many USARTs have an internal loopback test capability.
Another prior art circuit, published in the IBM technical manual for the PC AT, uses a 74LS322 shift register for serial to parallel and parallel to serial conversion. This circuit, however, does not include a loopback test capability.
There is need in the art for an interface circuit using the standard keyboard protocol that includes loopback capability. There is another need in the art for such a circuit that avoids race conditions between the data and clock signals. A still further need is for such a circuit that uses simple shift registers while still providing loopback capability. The present invention meets these and other needs in the art.